ASIC Design Verification Engineer II Full Time - United States

Cisco · San Jose

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Company
Cisco
Location
San Jose
Employment type
Full-time
Posted
September 19, 2026

About this job

Maintaining existing DV environments and enhancing them Construct test bench including scoreboard, agents, sequencers, and monitors for new blocks Write test plan, develop test cases, debug regression failures and drive to module verification closure Ensuring complete verification coverage through implementation and review of code and functional coverage. Minimum Qualifications Meet one of the following (completed within the past 3 years or ex pected to be completed within the next 12 months): -A Master's degree with 0 years of work experience; -A Bachelor's degree with 2 years of work experience. Qualifying education and work experience should be in ASIC Engineering, Verification or a related field. Experience with System Verilog and UVM methodology.…

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