Digital Verification Engineer
Neuralink · South San Francisco
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- Company
- Neuralink
- Location
- South San Francisco
- Salary
- $131,000 — $243,000
- Posted
- August 4, 2026
About this job
Job Description & Responsibilities: We are looking for ASIC Design Verification Engineers with strong CPU, ASIC design and verification fundamentals to work in Neuralink’s System-on-Chip (SoC) department under the Implant Team. This position offers a rare and unique opportunity to have a high impact in realizing state-of-the-art brain-computer interfaces. The team delivers architecture and logic implementation of digital modules with a strong focus in high-throughput low-power digital signal processing (DSP). We have crafted a team of exceptional engineers whose mission is to push the frontiers of what is possible today and define the future. Required qualifications: Minimum 3 years of experience in digital ASIC verification. Excellence in SystemVerilog.…
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