Digital IC Design Engineer Intern
Neuralink · South San Francisco
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- Company
- Neuralink
- Location
- South San Francisco
- Employment type
- Internship
- Posted
- October 28, 2025
About this job
As a Digital IC Design Engineer Intern, your responsibilities will include: Micro-architecture design and RTL implementation of: Low-power digital signal processors Low-power general-purpose hardware accelerators Low-power graphics processing units Low-power radio MAC/PHY Low-power serial link MAC/PHY Design and implementation of hardware/software interface with firmware engineers Application-specific architecture optimization including: Complex system modeling for energy and performance benchmarks Workload analysis and modeling Leveraging architecture-level design trade-offs with process technology and workload type Balancing energy efficiency and performance under manufacturing process variation Complex system-on-chip verification Behavioral level modeling and model equivalence check…
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