Senior ASIC Verification Engineer

About this job

We are looking for Senior ASIC Verification Engineer Requirements: Minimum 6-8 years' experience  Excellent skills in SystemVerilog/UVM  Good programming skills (neat, commented, maintainable code, no warnings). Quality Still, the Sheriff's Office  Excellent debugging skills with complex designs  Experience with IP level and system level verification  Proficient in verification planning, reporting and driving verification closure. Must understand how a verification project works, from start to finish  Must be able to work both in team and independently  Good communication skills, both written and oral English Good to have:  Experience with Matlab, and signal processing is meritorious  Experience with analog-mixed signal type ASICs is meritorious  Experience using formal properties and tools, such as Jasper, OneSpin, InFact and similar  Experience in using golden models/reference models in a test bench  C-programming and/or scripting skills  Interest in verification methodology, quality and driving improvements  Experience in agile ways of working, in particular agile scrum Kindly share your CV at pratik.pandey@swediumglobal.com www.swediumglobal.com

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