Senior FPGA Engineer (VHDL/Verilog)

AGAD Technology · Schelle, Flanders

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Company
AGAD Technology
Location
Schelle, Flanders
Posted
August 3, 2026

About this job

Work Arrangement: This role is based in Schelle, Belgium, with the possibility of hybrid work. Applicants must already have the legal right to work in Belgium. Visa sponsorship or work permit support is not available. Role Overview As a Senior FPGA Engineer, you will contribute to the development of key components within advanced networking systems, including SmartNICs and hybrid optical switches. You will be responsible for designing and optimizing VHDL and/or Verilog implementations, followed by verifying your designs through simulation using Python-based test cases and scenarios. You will integrate your designs and IP cores into FPGA projects, perform timing analysis, and conduct on-target verification.…

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Engineer salaries in Belgium

Based on 96 postings that disclose pay.

Median salarygross / year
€45,500
€40,500Typical range€54,000

Estimated from advertised pay across our sources — indicative gross annual figures, not an offer.

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Senior FPGA Engineer (VHDL/Verilog) — AGAD Technology | NewLuxJob