ASIC Design Engineer, STA
Cisco · San Jose
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- Company
- Cisco
- Location
- San Jose
- Employment type
- Full-time
- Posted
- September 10, 2026
About this job
Become part of our team as an ASIC Design Engineer, STA, focusing on closing timing at block, sub-chip, and full-chip levels. You will conduct quality checks and manage ECO tasks, supporting STA flow development and advising on best practices. Ideal for candidates with relevant experience in ASIC design and timing analysis.
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Most-requested skills in United States
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